საკვანძო სიტყვების ძებნა

  • Main
  • საკვანძო სიტყვების ძებნა
2
Negative Capacitance Field Effect Transistors: Physics, Design, Modeling and Applications

Negative Capacitance Field Effect Transistors: Physics, Design, Modeling and Applications

Young Suh Song, Shubham Tayal, Shiromani Balmukund Rahi & Abhishek Kumar Upadhyay
წელი:
2024
ენა:
english
ფაილი:
PDF, 19.15 MB
0 / 5.0
english, 2024
4
Beyond Si-Based CMOS Devices: Materials to Architecture

Beyond Si-Based CMOS Devices: Materials to Architecture

Sangeeta Singh, Shashi Kant Sharma, Durgesh Nandan
წელი:
2024
ენა:
english
ფაილი:
PDF, 14.24 MB
0 / 4.5
english, 2024
5
Advanced Ultra Low-Power Semiconductor Devices

Advanced Ultra Low-Power Semiconductor Devices

Tayal, Shubham, Upadhyay, Abhishek Kumar, Rahi, Shiromani Balmukund, Song, Young Suh, & Abhishek Kumar Upadhyay & Shiromani Balmukund Rahi & Young Suh Song
წელი:
2021
ენა:
english
ფაილი:
EPUB, 14.25 MB
0 / 5.0
english, 2021
6
Advanced Nanoscale MOSFET Architectures

Advanced Nanoscale MOSFET Architectures

Kalyan Biswas, Angsuman Sarkar
წელი:
2024
ენა:
english
ფაილი:
PDF, 11.52 MB
5.0 / 5.0
english, 2024
7
Emerging Low-Power Semiconductor Devices: Applications for Future Technology Nodes

Emerging Low-Power Semiconductor Devices: Applications for Future Technology Nodes

Shubham Tayal (editor), Deepak Kumar (editor), Shiromani Balmukund Rahi (editor), Abhishek Kumar Upadhyay (editor)
წელი:
2022
ენა:
english
ფაილი:
PDF, 17.94 MB
5.0 / 5.0
english, 2022
8
Advanced Nanoscale MOSFET Architectures: Current Trends and Future Perspectives

Advanced Nanoscale MOSFET Architectures: Current Trends and Future Perspectives

Biswas, Kalyan, Sarkar, Angsuman, & Angsuman Sarkar
წელი:
2024
ენა:
english
ფაილი:
PDF, 29.87 MB
0 / 5.0
english, 2024
10
VLSI-SoC: System-on-Chip in the Nanoscale Era - Design, Verification and Reliability : 24th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016, Revised Selected Papers

VLSI-SoC: System-on-Chip in the Nanoscale Era - Design, Verification and Reliability : 24th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016, Revised Selected Papers

Hollstein, Thomas, Kostin, Sergeĭ, O'Connor, Ian, Raik, Jaan, Reis, Ricardo, Tšertov, Anton
circuits
voltage
proposed
tfet
vdd
gate
signal
mosfet
circuit
algorithm
disparity
method
different
approach
gates
clock
devices
error
processor
switching
generation
matrix
delay
memory
frequency
first
stress
current
input
verification
architecture
device
processing
values
output
technology
function
path
shows
conference
cmos
metamodel
shown
synthesis
behavior
memristors
compared
core
soc
silicon
წელი:
2017
ენა:
english
ფაილი:
PDF, 16.11 MB
0 / 0
english, 2017